Fourth Workshop on
Programmability Issues for Heterogeneous Multicores
(MULTIPROG-2011)
Held in conjunction with:
the 6th International Conference on
High-Performance and Embedded Architectures and Compilers (HiPEAC)
Heraklion, Crete, Greece, January 23, 2011
Computer manufacturers have already embarked on the multi-core roadmap, promising to add more and more cores/hardware threads on a chip: many-cores are on the horizon. This shift to an increasing number of cores and heterogeneous architectures has placed new burdens on the programming community. Until now, software has been developed with a single processor in mind and it needs to be parallelized and optimized for accelerators such as GPUs to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand.
The fourth edition of the MULTIPROG workshop aimed to bring together, and cause fruitful interaction between, researchers interested in programming models and their implementation and in computer architecture, with special emphasis on heterogeneous architectures. A wide spectrum of issues were central themes for this workshop such as what the future programming models should look like to accelerate software productivity, how compilers, run-times and architectures should support these new programming models, innovative algorithm and data structure development, and heterogeneous embedded, accelerated systems.
MULTIPROG is intended for quick publication of early results, work-in-progress, etc, and is not intended to prevent later publication of extended papers. We prioritized papers addressing cross-cutting issues and providing thought-provoking insights into the main themes. All accepted papers for presentation were published on the workshop informal proceedings.
In this edition, for the first time, two AMD Best Paper Awards were presented to the two most outstanding papers presented at MULTIPROG-2011. Each winner received a high-end ATi graphics card sponsored by AMD.
Topics of interest
Papers were sought on topics including, but not limited to:
- Multi-core architectures
- Architectural support for compilers/programming models
- Processor (core) architecture and accelerators, in particular GPUs
- Memory system architecture
- Performance, power, temperature, and reliability issues
- Heterogeneous computing
- Algorithms and data structures for heterogeneous systems
- Applications for heterogeneous computing and real-time graphics
- Programming models for multi-core architectures
- Language extensions
- Run-time systems
- Compiler optimizations and techniques
- Tools for discovering and understanding parallelism
- Tools for understanding performance and debugging
- Case studies and performance evaluation
- Benchmarking of multi-/many-core architectures
Final program
PDF file with all papers included in the informal proceedings.
| 08:45-09:00 | Opening session |
| 09:00-09:45 | Keynote session I |
|
The Quest for General Purpose Parallel Programming [Abstract]
Tim Mattson, Intel [Speaker Bio] | |
| 09:45-10:45 | Session 1: Performance |
|
Analysing the Variability of OpenMP Programs Performances on Multicore Architectures, A. Mazouz, S. Touati and D. Barthou | |
|
A Methodology for Diagnosing Critical Section Bottlenecks in Multi-threaded Applications, G. Chen, P. Stenstrom | |
| 10:45-11:00 | Coffee break |
| 11:00-12:30 | Session 2: Programming models and compilers |
|
Towards Full Parallelization of Constraint Programming, C. Rolfi, K. Kuchcinski | |
|
Energy efficient tiling on a many-core architecture, E. Garcia, D. Orozco, G. Gao | |
|
Compiler Driven Code Comments and Refactoring, P. Larsen, R. Ladelsky, S. Karlsson, A. Zaks | |
| 12:30-14:00 | Lunch |
| 14:00-14:45 | Keynote session II |
|
To Program or Not to Program the Memory Hierarchy? [Abstract]
Dimitrios S. Nikolopoulos, U. of Crete and FORTH-ICS [Speaker Bio] | |
| 14:45-15:45 | Session 3: Shared-memory Synchronization |
|
Comparing the Overhead of Lock-based and Lock-free Implementations of Priority Queues, S. Passas, S. Karlsson | |
|
Techniques for Reduction of Conflicts in Hardware Transactional Memory, M. Waliullah, P. Stenstrom | |
| 15:45-16:00 | Coffee break |
| 16:00-17:30 | Session 4: GPUs |
|
Parallelizing Multicore Cache Simulations using Heterogeneous Computing on General Purpose and Graphics Processors, N. Strikos, G. Keramidas, S. Kaxiras | |
|
Soren: Adaptive MapReduce for Programmable GPUs, R. Mokhtari, A. Abbasi, F. Khunjush, R. Azimi | |
|
Auto-tuning SkePU: A Multi-Backend Skeleton Programming Framework for Multi-GPU Systems, | |
| U. Dastgeer, J. Enmyren, C. Kessler | |
Organizers
| Eduard Ayguade | UPC/Barcelona Supercomputing Center | Spain | eduard[at]ac.upc.edu |
| Benedict R. Gaster | Advanced Micro Devices (AMD) | USA | benedict.gaster[at]amd.com |
| Roberto Gioiosa | Barcelona Supercomputing Center | Spain | roberto.gioiosa[at]bsc.es |
| Lee Howes | Advanced Micro Devices (AMD) | USA | lee.howes[at]amd.com |
| Per Stenstrom | Chalmers University of Technology | Sweden | pers[at]chalmers.se |
| Osman Unsal | BSC-Microsoft Research Centre | Spain | osman.unsal[at]bsc.es |
Program committee
| Ben Bergen | LANL | USA |
| Manuel Chakravarty | U. of New South Wales | Australia |
| Mats Brorsson | KTH | Sweden |
| Marcelo Cintra | U. of Edinburgh | UK |
| Pascal Felber | U. of Neuchatel | Switzerland |
| Guang Gao | U. of Delawere | USA |
| Roberto Giorgi | U. of Siena | Italy |
| Hakan Grahn | Blekinge Institute of Technology | Sweden |
| Tim Harris | Microsoft Research Cambridge | UK |
| Wen-mei Hwu | U. of Illinois, Urbana-Champaign | USA |
| Mike Houston | AMD | USA |
| Paul Kelly | Imperial College of London | UK |
| Mikel Lujan | U. of Manchester | UK |
| Tim Mattson | Intel Research | USA |
| Simon McKintosh-Smith | U. of Bristol | UK |
| Avi Mendelson | Microsoft | Israel |
| Nacho Navarro | UPC/BSC | Spain |
| Dimitris Nikolopoulos | FORTH-ICS | Greece |
| Andy Pimentel | U. of Amsterdam | The Netherlands |
| Oscar Plata | U. of Malaga | Spain |
| Yanos Sazeides | U. of Cyprus | Cyprus |
| Andre Seznec | INRIA/IRISA | France |
| Nir Shavit | Tel Aviv U. | Israel |
| John E. Stone | U. of Illinois | USA |
Webmaster: eduard[at]ac.upc.edu