CALL FOR PAPERS Third Workshop on Programmability Issues for Multi-Core Computers (MULTIPROG-2010) Held in conjunction with the 5th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC) Pisa, Italy, January 24, 2010 Workshop website: http://multiprog.ac.upc.edu/ Goal of the Workshop -------------------- Computer manufacturers have already embarked on the multi-core roadmap, promising to double the number of processors on a chip every other year, and many-cores are on the horizon. This shift to an increasing number of cores and heterogenoeus architectures has placed new burdens on the programming community. Until now, software has been developed with a single processor in mind and it needs to be parallelized (and optimized for accelerators such as GPUs) to take advantage of the new breed of multi-/many-core computers. As a result, progress in how to easily harness the computing power of multi-core architectures is in great demand. The third edition of the MULTIPROG workshop aims to bring together, and cause fruitful interaction between, researchers interested in programming models and their implementation and in computer architecture with the common interest in advancing our knowledge how to simplify the task of parallelization of software for multi-core platforms. A wide spectrum of issues are central themes for this workshop such as what the future programming models should look like to accelerate software productivity and how it should be implemented at the runtime, the compiler, and the architecture level. MULTIPROG is intended for quick publication of early results, work-in-progress, etc, and is not intended to prevent later publication of extended papers. We will prioritize papers addressing cross-cutting issues and that provide thought-provoking insights into the main themes. Proceedings with accepted papers will be made available at the workshop. Selected papers will appear on a special issue of Transactions on HiPEAC, after a new review process. Topics of interest ------------------ Papers are sought on topics including, but not limited to: * Multi-core architectures o Architectural support for compilers/programming models o Processor (core) architecture and accelerators (GPUs, ...) o Memory system architecture o Performance/power issues * Programming models for multi-core architectures o Language extensions o Run-time systems o Compiler optimizations and techniques o Tools for discovering and understanding parallelism * Benchmarking of multi-/many-core architectures Organizers ---------- Eduard Ayguade UPC and Barcelona Supercomputing Center Spain (eduard[at]ac.upc.edu) Roberto Gioiosa IBM Research - Watson USA (rgioios[at]us.ibm.com) Per Stenstrom Chalmers University of Technology Sweden (pers[at]chalmers.se) Osman Unsal BSC-Microsoft Research Centre Spain (osman.unsal[at]bsc.es) Important dates --------------- Abstract Submission: October 9, 2009 Extended Submission Deadline: October 18, 2009 Notification to authors: November 27, 2009 Final version of accepted papers: December 18, 2009 Paper submission ---------------- Submitted papers should use the LNCS format and should be 12 pages maximum. Manuscript preparation guidelines can be found at the LNCS web site. Please check that (i) pages are numbered, and (ii) graphs etc. remain legible when printed in black and white. Additional information about paper submission will be available through the workshop website. Program commitee ---------------- Mohammad Ansari University of Manchester, UK Francois Bodin, CAPS Entreprise, France Mats Brorsson, KTH, Sweden Magnus Ekman, NVIDIA, USA Pascal Felber University of Neuchatel, Switzerland Guang Gao University of Delaware, USA Maria Garzaran, University of Illinois, Urbana-Champaign, USA Roberto Giorgi, University of Siena, Italy Tim Harris Microsoft Research Cambridge, UK Stefanos Kaxiras, Univ of Patras, Greece Mikel Lujan, University of Manchester, UK Milo Martin, University of Pennslyvania, USA Ami Marwoka, Bar-Ilan University, Israel Avi Mendelson, Microsoft, Israel Dimitris Nikolopoulos, FORTH-ICS, Greece Oscar Plata, University of Malaga, Spain Andre Seznec, INRIA/IRISA, France< Nir Shavit Tel Aviv University, Israel Peng Wu, IBM Research Watson, USA